Functional safety is an area of computing that is becoming ever more important as we see more and more embedded technologies integrated into our daily lives. Arm’s Automotive Enhanced (AE) line of IP had been launched back in 2018 with the release of the Cortex-A76AE.

Fast-forward a few years, it’s time for a new set of AE IP, with Arm now introducing the new Cortex-A78AE, bringing a higher performance CPU core, and also for the first time introducing an AE class GPU and ISP in the form of the Mali-G78AE and Mali-C71AE. With the move, Arm also says that it is diversifying beyond just the automotive sector and widening the scope to industrial and other autonomous systems.

Hercules-AE is Cortex-A78AE

Starting off with the CPU, the new IP isn’t exactly new as we’ve first heard about the new Hercules-AE design last year during Nvidia’s announcement of their “Orin” automotive SoC.

The new Cortex-A78AE, as its name implies, is based off the Cortex-A78 microarchitecture which we’ve extensively covered in in our in-depth Tech Day article earlier this summer.

Compared to the previous generation Corex-A76AE this means a 30% uplift in IPC and higher performance.

What’s new this year in regards to the functional safety features of the IP is the introduction of a new operating “hybrid mode” that represents a new architecture for how to achieve ASIL-B compliance, but with a lesser performance impact compared to the existing Split Mode operating mode.

Functional safety currently is achieved on AE CPUs by running in either “Split Mode” or “Locked Mode”. Locked mode is quite straightforward and includes running pairs of cores in lock-step with additional logic controlling that the computational results between the pairs are consistent at all times. Effectively this cuts your throughput in half as you are always duplicating work done.

Split mode maintaining ASIL-B functional safety still requires the cores to be periodically checked for correct operation which makes them temporarily unavailable. The problem lies at the DSU-level (Dynamic Shared Unit – the L3 cache) as for this to be checked it will make the whole CPU cluster unavailable, and this has a larger performance impact on the system.

The new hybrid mode adds additional logic on the part of the DSU to enable it failure detection without having to make it unavailable to the CPUs, and thus ensuring continuous operation and computational throughput. It’s to be noted that this redundancy on the part of the DSU means additional control logic, but does not include actually duplicating the L3 SRAMs which would incur a large area penalty.

The new hybrid mode thus would represent a higher performing design configuration for ASIL-B workloads with a comparatively smaller cost in area overheard in the DSU. If a vendor chooses to implement Hybrid Mode or remains with the simpler Split Mode configuration is a design-time choice that takes into account the extra area requirements. ASIL-D operation in Locked Mode naturally continues to require the extra area investment.

As noted, the Cortex-A78AE had already been licensed quite some time ago and Nvidia’s new Orin SoC with 12 cores is the first publicly known design to employ the new cores.

Mali-G78AE - Finally introducing virtualisation

Alongside the Cortex-A78AE, Arm is also for the first time announcing a functional safety capable GPU in the form of the new Mali-G78AE. Based on the mobile Mali-G78 GPU core, we should be expecting similar performance and power efficiency figures from the IP- scaling up from 1 to 24 cores.

The important addition of the new IP is the inclusion of full-fledged hardware virtualisation, a critical feature for autonomous systems that to date had been lacking in the company’s GPU IP.

Hardware virtualisation is important to be able to separate safety critical software from other non-critical workloads, ensuring that if anything were to go wrong (such as for example some odd workload crashing the GPU driver), that the safety critical components continue to operate without issue.

Samsung’s Exynos Auto V9 is an example of such a SoC design where previously it had to deploy 3 GPU clusters (MP12+MP3+MP3) to ensure independent workload operation that would not impact critical systems.

With hardware virtualisation, a newer design with the Mali-G78AE wouldn’t require multiple GPU clusters and instead be able to use a single GPU, flexibly partitioning inner-GPU execution resources between concurrent multiple workloads. The IP supports four such partitions. Beyond the hardware partitioning, software virtualisation also allows time-split operation of workloads within the same partition.

The new IP supports functional safety to an ASIL-B standard – this is both a design limitation, however Arm also says that this is currently what customers are demanding. It would be possible to achieve higher ASIL-D ability in a design if you put down two identical GPUs in your design and compare outputs.

Beyond the announcement of the new CPU and GPU IP, we’re also seeing an extension of the company’s existing Mali-C71 ISP IP with the new C71AE which adds support for ASIL-B and SIL2 integrity checking.

Also part of the announcement today is Arm’s enablement for reference autonomous platforms:

Beyond these new amazing hardware technologies, we are working to enable the developers of autonomous systems. For software developers we are enabling familiar cloud native technologies in autonomous applications to ease development, while Arm development solutions accelerate software development and validation while shortening the path to deployment. For developers of autonomous silicon, our physical IP, training and design reviews help reduce risk.

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